The paper describes that new ferroelectric materials could improve the performance and energy efficiency of flash memories used in data centers and autonomous systems[1]. Modern flash chips store multiple voltage levels per cell and are layered over more than 300 layers, allowing up to 2 terabytes per chip[1]. In 2023, researchers at SK Hynix showed that by adding an insulating layer, they can trap charge above the hafnium-oxide layer and create a hybrid conventional-ferroelectric device with an extended "memory window" at 10.5 volts[1]. Several teams have begun using this tactic, and experts have called it pioneering work[1]. Samsung's research showed that replacing silicon channels with indium-gallium-zinc-oxide channels reduced the power consumption of ferroelectric memories by 96% while maintaining the 10.5-volt memory window, according to an article in Nature[1]. The article states that this reduction in power consumption solves the problem of increasing power consumption as the number of layers increases, as the required "pass voltage" to access the cells increases with a higher number of layers[1]. The authors and experts cited in the paper consider these material and design changes to be significant steps towards more energy-efficient and denser memory chips for future AI and robotics applications[1].